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  <div class="content col-sm-8 col-md-6 col-lg-7 main">
    <h1 id="sel4-project-status">seL4 Project Status</h1>

<p>The seL4 project contains a lot of different features and components that work across
different hardware platforms and configurations. This page tries to give an overview
of what exists, its development status, what level of support it has, who is
responsible for maintaining it and where to find more information.</p>

<h2 id="verification-status">Verification Status</h2>

<p>See status about <a href="/projects/sel4/verified-configurations.html">Verified Configurations</a></p>

<h2 id="features">Features</h2>

<h3 id="architectures">Architectures</h3>

<table>
    <thead>
        <tr>
            <th>Features</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>Arm</td>
            <td>Arm architecture support.</td>
            <td>ArmV6, ArmV7, ArmV8, 32 and 64bit</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>x86</td>
            <td>x86 architecture support.</td>
            <td>ia32 and x86_64 (32/64bit)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>RISC-V</td>
            <td>RISC-V architecture support.</td>
            <td>riscv32, riscv64, imac extensions, sv32 and sv39 virtual memory</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="virtualization-extensions">Virtualization extensions</h3>

<table>
    <thead>
        <tr>
            <th>Features</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>Aarch64 hyp</td>
            <td>Support for running seL4 in EL2, Aarch64 on ArmV8</td>
            <td>Supported on the following platforms: FIXME</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>arm hyp</td>
            <td>Support for running seL4 in hyp mode, on ArmV7</td>
            <td>Supported on the following platforms: FIXME</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>Intel VT-x</td>
            <td>Support for using x86 hardware virtualization on seL4.</td>
            <td>Supported on the following platforms: FIXME</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>RISC-V hyp mode</td>
            <td>Support for utilizing RISC-V Hyp extensions on seL4. [More information](https://github.com/SEL4PROJ/sel4-riscv-vmm-manifest/blob/master/README.md)</td>
            <td>Experimental branches exist for RISCV HE v0.6</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="multicore">Multicore</h3>

<table>
    <thead>
        <tr>
            <th>Features</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>Arm multicore support</td>
            <td>Support for Arm SMP</td>
            <td>Supported on the following platforms/cores: FIXME</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>x86 multicore support</td>
            <td>Support for x86 SMP</td>
            <td>Supported on the following platforms/cores: FIXME</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>RISC-V multicore support</td>
            <td>Support for RISC-V SMP</td>
            <td>Supported on the following platforms/cores: HiFive Unleashed</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="mixed-criticality">Mixed criticality</h3>

<table>
    <thead>
        <tr>
            <th>Features</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>MCS Verification support</td>
            <td>Verification of the MCS extenstions to seL4</td>
            <td>Under development.</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>MCS Hyp support</td>
            <td>MCS + Hyp extensions on seL4</td>
            <td>?.</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>MCS SMP support</td>
            <td>MCS + SMP on seL4</td>
            <td>?.</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>MCS Fastpath support</td>
            <td>Fastpath operations require a Scheduling Context donation to occur.</td>
            <td>?.</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="fastpath">Fastpath</h3>

<table>
    <thead>
        <tr>
            <th>Features</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>seL4_Call() Fastpath</td>
            <td>seL4_Call operations that meet certain criteria will use the fastpath.</td>
            <td>Supported on all platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>seL4_ReplyRecv() Fastpath</td>
            <td>seL4_ReplyRecv operations that meet certain criteria will use the fastpath.</td>
            <td>Supported on all platforms</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="iommu">IOMMU</h3>

<table>
    <thead>
        <tr>
            <th>Features</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>Intel VT-d</td>
            <td>x86 IOMMU support on seL4 via additional page table object definitions.</td>
            <td>Supported on the following platforms/cores: FIXME</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>Jetson TK1 SMMU</td>
            <td>Supported on seL4 via additional page table object definitions.</td>
            <td>Only applies to Jetson TK1 platform.</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>Arm SMMUv2</td>
            <td>Generic Arm SMMU support on seL4 via additional page table object definitions.</td>
            <td>Under development.</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h2 id="hardware-platforms">Hardware platforms</h2>

<p>See status about <a href="/Hardware">Supported platforms</a>.</p>

<h2 id="components">Components</h2>

<p>Components are parts of the project that are more likely to be independent or substituted
with other components.  They can also be used as building blocks in parts of a wider system.</p>

<h3 id="verified-configurations">Verified configurations</h3>

<p>A veried configuration is a CMake settings file that is expected to produce a unique kernel
image that can be used as an input to he L4.verified project for verification.
See <a href="/projects/sel4/verified-configurations.html">Verified Configurations</a> for more information.
A verified configuration can be imported into a CMake build system that targets seL4 to set
valid verification compatible configuration options. It can also be used to produce a standalone
kernel image.</p>

<table>
    <thead>
        <tr>
            <th>Components</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>[ARM_HYP verification configuration](https://github.com/seL4/seL4/blob/master/configs/ARM_HYP_verified.cmake)</td>
            <td>Build configuration settings for ARM_HYP verification target</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>ARM_MCS verification configuration</td>
            <td>Build configuration settings for ARM_MCS verification target</td>
            <td>active (but ARM_MCS verification support is Coming Soon)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>ARM verification configuration</td>
            <td>Build configuration settings for ARM verification target</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>RISCV64 verification configuration</td>
            <td>Build configuration settings for RISCV64 verification target</td>
            <td>active (but RISCV64 verification support is Coming Soon)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>X64 verification configuration</td>
            <td>Build configuration settings for X64 verification target</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="libsel4">libsel4</h3>

<p>The libsel4 contains the interface that seL4 provides to user-level threads, including system calls,
capability types, and definitions of the key data structures (e.g., boot_info).</p>
<h3 id="manual">Manual</h3>

<p>The manual contains the source files for generating the <a href="https://sel4.systems/Info/Docs/seL4-manual-latest.pdf">seL4 reference manual</a>.</p>

<h3 id="kernel-drivers">Kernel drivers</h3>

<h4 id="timer">Timer</h4>

<table>
    <thead>
        <tr>
            <th>Components</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>allwinner,sun4i-a10-timer</td>
            <td>allwinnera20 timer seL4 driver</td>
            <td>Inactive, currently used by the unmaintained alwinnera20 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>samsung,exynos4210-mct</td>
            <td>exynos5 timer seL4 driver that wraps Arm Generic timer</td>
            <td>Active, currently used by the exynos5 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>arm,cortex-a9-global-timer</td>
            <td>Arm cortex-a9 global timer seL4 driver</td>
            <td>Active, currently used by the cortex-a9 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>qcom,kpss-timer</td>
            <td>apq8064 timer seL4 driver</td>
            <td>Inactive, currently used by the currently unmaintained apq8064 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>ti,am335x-timer</td>
            <td>am335x timer seL4 driver</td>
            <td>Active, currently used by the am335x seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>samsung,exynos4412-mct</td>
            <td>exynos4 timer seL4 driver</td>
            <td>Active, currently used by the exynos4 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>ti,omap3430-timer</td>
            <td>omap3 timer seL4 driver</td>
            <td>Active, currently used by the omap3 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>arm,armv7-timer;arm,armv8-timer</td>
            <td>Arm generic timer seL4 driver</td>
            <td>Active, currently used by several Arm seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>arm,cortex-a9-twd-timer</td>
            <td>Arm cortex-a9 private timer seL4 driver</td>
            <td>Active, currently used by the cortex-a9 seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>pc99,pit</td>
            <td>x86 PIT timer seL4 driver</td>
            <td>Active, currently used by the pc99 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h4 id="serial">Serial</h4>

<table>
    <thead>
        <tr>
            <th>Components</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>brcm,bcm2835-aux-uart</td>
            <td>Raspberry Pi serial seL4 driver</td>
            <td>active, currently used by the rpi3 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>samsung,exynos4210-uart</td>
            <td>exynos4210 serial seL4 driver</td>
            <td>active, currently used by the exynos4 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>amlogic,meson-gx-uart</td>
            <td>odroidc2 serial seL4 driver</td>
            <td>active, currently used by the odroidc2 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>arm,pl011</td>
            <td>Arm standard serial seL4 driver</td>
            <td>active, currently used by several seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>xlnx,xuartps</td>
            <td>Xilinx serial seL4 driver</td>
            <td>active, currently used by some zynq* seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>fsl,imx**-uart</td>
            <td>i.MX serial seL4 driver</td>
            <td>active, currently used by some imx* seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>qcom,msm-uartdm</td>
            <td>apq8064 serial seL4 driver</td>
            <td>Inactive, currently used by the currently unmaintained apq8064 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>nvidia,tegra20-uart;ti,omap3-uart;snps,dw-apb-uart</td>
            <td>Simple Arm serial seL4 driver</td>
            <td>Active, currently used by nvidia- and beagle- based seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>x86,serial</td>
            <td>Intel COM port serial seL4 driver</td>
            <td>Active, currently used by the pc99 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h4 id="interrupt-controllers">Interrupt controllers</h4>

<table>
    <thead>
        <tr>
            <th>Components</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>ti,am33xx-intc</td>
            <td>am335x interrupt controller seL4 driver</td>
            <td>active, currently used by am335x seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>brcm,bcm2836-armctrl-ic</td>
            <td>Broadcom Raspberry Pi interrupt controller seL4 driver</td>
            <td>active, currently used by the rpi3 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>hifive-plic</td>
            <td>HiFive interrupt controller seL4 driver</td>
            <td>active, currently used by the hifive seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>ti,omap3-intc</td>
            <td>omap3 interrupt controller seL4 driver</td>
            <td>active, currently used by the omap3 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>arm,gic-v2</td>
            <td>Arm GICv2 interrupt controller seL4 driver</td>
            <td>active, currently used by several seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>arm,gic-v3</td>
            <td>Arm GICv2 interrupt controller seL4 driver</td>
            <td>active, currently used by several seL4 platforms</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>x86,pic</td>
            <td>Intel 8259 Programmable Interrupt Controller (PIC) seL4 driver</td>
            <td>active, currently used by the pc99 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>x86,ioapic</td>
            <td>Intel IOAPIC seL4 driver</td>
            <td>active, currently used by the pc99 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>x86,lapic</td>
            <td>Intel Local APIC seL4 IRQ and timer driver</td>
            <td>active, currently used by the pc99 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h4 id="iommus">IOMMUs</h4>

<table>
    <thead>
        <tr>
            <th>Components</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>tk1,smmu</td>
            <td>Tegra K1 System MMU (SMMU) seL4 driver</td>
            <td>Active, currently used by the tk1 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>intel,vtd</td>
            <td>Intel VT-d (IOMMU) seL4 driver</td>
            <td>Active, currently used by the pc99 seL4 platform</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="device-trees">Device trees</h3>

<table>
    <thead>
        <tr>
            <th>Components</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>am335x-boneblack.dts</td>
            <td>am335x-boneblack platform device tree (dts) sourced from Linux kernel path: am335x-boneblack</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>am335x-boneblue.dts</td>
            <td>am335x-boneblue platform device tree (dts) sourced from Linux kernel path: am335x-boneblue</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>rpi3.dts</td>
            <td>rpi3 platform device tree (dts) sourced from Linux kernel path: bcm2837-rpi-3-b</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>exynos4.dts</td>
            <td>exynos4 platform device tree (dts) sourced from Linux kernel path: exynos4412-odroidx</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>exynos5250.dts</td>
            <td>exynos5250 platform device tree (dts) sourced from Linux kernel path: exynos5250-arndale</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>exynos5410.dts</td>
            <td>exynos5410 platform device tree (dts) sourced from Linux kernel path: exynos5410-odroidxu</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>exynos5422.dts</td>
            <td>exynos5422 platform device tree (dts) sourced from Linux kernel path: exynos5422-odroidxu4</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>sabre.dts</td>
            <td>sabre platform device tree (dts) sourced from Linux kernel path: imx6q-sabrelite</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>wandq.dts</td>
            <td>wandq platform device tree (dts) sourced from Linux kernel path: imx6q-wandboard-revd1</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>imx7sabre.dts</td>
            <td>imx7sabre platform device tree (dts) sourced from Linux kernel path: imx7d-sdb</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>omap3.dts</td>
            <td>omap3 platform device tree (dts) sourced from Linux kernel path: omap3-beagle</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>apq8064.dts</td>
            <td>apq8064 platform device tree (dts) sourced from Linux kernel path: qcom-apq8064-ifc6410</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>allwinnera20.dts</td>
            <td>allwinnera20 platform device tree (dts) sourced from Linux kernel path: sun7i-a20-cubietruck</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>tk1.dts</td>
            <td>tk1 platform device tree (dts) sourced from Linux kernel path: tegra124-jetson-tk1</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>zynq7000.dts</td>
            <td>zynq7000 platform device tree (dts) sourced from Linux kernel path: zynq-zc706</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>odroidc2.dts</td>
            <td>odroidc2 platform device tree (dts) sourced from Linux kernel path: amlogic/meson-gxbb-odroidc2</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>hikey.dts</td>
            <td>hikey platform device tree (dts) sourced from Linux kernel path: hisilicon/hi6220-hikey</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>tx1.dts</td>
            <td>tx1 platform device tree (dts) sourced from Linux kernel path: nvidia/tegra210-p2371-2180</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>ultra96.dts</td>
            <td>ultra96 platform device tree (dts) sourced from Linux kernel path: xilinx/avnet-ultra96-rev1</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>zynqmp.dts</td>
            <td>zynqmp platform device tree (dts) sourced from Linux kernel path: xilinx/zynqmp-zcu102-rev1.0</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>imx8mq-evk.dts</td>
            <td>imx8mq-evk platform device tree (dts) sourced from Linux kernel path: freescale/fsl-imx8mq-evk</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>imx8mm-evk.dts</td>
            <td>imx8mm-evk platform device tree (dts) sourced from Linux kernel path: freescale/fsl-imx8mm-evk</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>rockpro64.dts</td>
            <td>rockpro64 platform device tree (dts) sourced from Linux kernel path: rockchip/rk3399-rockpro64</td>
            <td>active</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h2 id="testing-and-benchmarking">Testing and Benchmarking</h2>

<h3 id="testing">Testing</h3>

<p>In addition to its verification, there is also an seL4 test suite <a href="/projects/sel4test">sel4test</a>
that can be built for a particular seL4 configuration.  The test suite is self-hosted and starts
as the initial roottask on seL4.</p>

<h3 id="benchmarking">Benchmarking</h3>

<p>A suite of benchmarks for measuring different seL4 operations are provided by <a href="/projects/sel4bench">sel4bench</a>.
This project is also built as a self-hosted root-task application on seL4.</p>

<h2 id="configurations">Configurations</h2>

<p>seL4 has several different options available for configuring seL4 to execute in different
scenarios. Many of these options are only expected to used during application or kernel
development and may not be suitable for a final release deployment that wants to leverage
seL4’s full capabilities.</p>

<p><em>Due to the experimental nature of many of the options, there may be undocumented incompatabilities
when trying to configure several options together. seL4test, seL4bench or other user level examples
can be used to test a baseline level of configuration correctness.</em></p>

<h3 id="generic-configuration-options">Generic configuration options</h3>

<table>
    <thead>
        <tr>
            <th>Configurations</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>KernelVerificationBuild</td>
            <td>When enabled this configuration option prevents the usage of any other options thatwould compromise the verification story of the kernel. Enabling this option does NOTimply you are using a verified kernel.</td>
            <td>Always set. (Default: ON)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelIsMCS</td>
            <td>Enable MCS feature for seL4.</td>
            <td>Available on all MCS supported platforms (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelRootCNodeSizeBits</td>
            <td>Root CNode Size (2^n slots) The acceptable range is 12-27 and 12-26, for 32-bit and 64-bit respectively. The root CNode needs at least enough space to contain up to BI_CAP_DYN_START.</td>
            <td>Always set (Default: 12)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelRetypeFanOutLimit</td>
            <td>Maximum number of objects that can be created in a single Retype() invocation.</td>
            <td>Always set. (Default: 256)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMaxNumBootinfoUntypedCaps</td>
            <td>Max number of untyped capabilities given to initial boot thread. Additional caps won't be handed to the system.</td>
            <td>Always set. (Default: 230 caps)</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="scheduling-configuration-options">Scheduling configuration options</h3>

<table>
    <thead>
        <tr>
            <th>Configurations</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>KernelTimerTickMS</td>
            <td>Kernel timer tick period in milliseconds.</td>
            <td>Only available on non-MCS kernels. (Default: 2 milliseconds)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelTimeSlice</td>
            <td>Number of kernel timer ticks until a thread is preempted.</td>
            <td>Only available on non-MCS kernels. (Default: 5 ticks)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelBootThreadTimeSlice</td>
            <td>Budget of booth thread: Number of milliseconds until the boot thread is preempted.</td>
            <td>Available on all MCS supported platforms. (Default: 5 milliseconds)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMaxNumWorkUnitsPerPreemption</td>
            <td>Maximum number of work units (delete/revoke iterations) until the kernel checks forpending interrupts (and preempts the currently running syscall if interrupts are pending).</td>
            <td>Always set. (Default: 100)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelResetChunkBits</td>
            <td>Maximum size in bits of chunks of memory to zero before checking a preemption point.</td>
            <td>Always set. (Default: 8 bits)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelNumDomains</td>
            <td>The number of scheduler domains in the system</td>
            <td>Always set. (Default: 1 domain)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelDomainSchedule</td>
            <td>A C file providing the symbols ksDomSchedule and ksDomeScheudleLength to be linked with the kernel as a scheduling configuration.</td>
            <td>Always set. (Default: src/config/default_domain.c)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelNumPriorities</td>
            <td>The number of priority levels per domain.</td>
            <td>Always set, Valid range 1-256. (Default: 256)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelWcetScale</td>
            <td>Multiplier to scale kernel WCET estimate by: the kernel WCET estimate  is used to ensure a thread has enough budget to get in and out of the  kernel. When running in a simulator the WCET estimate, which is tuned  for hardware, may not be sufficient. This option provides a hacky knob that can be fiddled with when running inside a simulator.</td>
            <td>Enabled if KernelIsMCS. (Default: 1)</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="debug-configuration-options">Debug configuration options</h3>

<table>
    <thead>
        <tr>
            <th>Configurations</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>KernelDebugBuild</td>
            <td>Enable debug facilities (symbols and assertions) in the kernel</td>
            <td>Disabled if KernelVerificationBuild is set. (Default: ON)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>HardwareDebugAPI</td>
            <td>Builds the kernel with support for a userspace debug API, which can allows userspace processes to set breakpoints, watchpoints and to single-step through thread execution.</td>
            <td>Requires platform support. (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelPrinting</td>
            <td>Allow the kernel to print out messages to the serial console during bootup and execution.</td>
            <td>Disabled if KernelVerificationBuild is set. (Default: Set to initial value of KernelDebugBuild)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelIRQReporting</td>
            <td>seL4 does not properly check for and handle spurious interrupts. This can result in unnecessary output from the kernel during debug builds. If you are CERTAIN these messages are benign then use this config to turn them off.</td>
            <td>Enabled if KernelPrinting is set. (Default: On)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelColourPrinting</td>
            <td>In debug mode, seL4 prints diagnostic messages to its serial output describing, e.g., the cause of system call errors. This setting determines whether ANSI escape codes are applied to colour code these error messages. You may wish to disable this setting if your serial output is redirected to a file or pipe.</td>
            <td>Enabled if KernelPrinting is set. (Default: On)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelUserStackTraceLength</td>
            <td>On a double fault the kernel can try and print out the users stack to aid debugging. This option determines how many words of stack should be printed.</td>
            <td>Enabled if KernelPrinting is set. (Default: 16)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelDebugDisablePrefetchers</td>
            <td>On ia32 platforms, this option disables the L2 hardware prefetcher, the L2 adjacent cache line prefetcher, the DCU prefetcher and the DCU IP prefetcher. On the cortex a53 this disables the L1 Data prefetcher.</td>
            <td>Available if KernelArchX86 OR KernelPlatformHikey is set. (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="performance-analysis-and-profiling-configuration-options">Performance analysis and profiling configuration options</h3>

<table>
    <thead>
        <tr>
            <th>Configurations</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>KernelFastpath</td>
            <td>Enable IPC fastpath.  Can be disabled for performance analyses.</td>
            <td>Always set. (Default: ON)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelFPUMaxRestoresSinceSwitch</td>
            <td>This option is a heuristic to attempt to detect when the FPU is no longer in use,allowing the kernel to save the FPU state out so that the FPU does not have to beenabled/disabled every thread switch. Every time we restore a thread and there isactive FPU state, we increment this setting and if it exceeds this threshold weswitch to the NULL state.</td>
            <td>Only set if the system is using the FPU. (Default: 64 switches)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelBenchmarks</td>
            <td>Enable benchamrks including logging and tracing info. Setting this value &gt; 1 enables a 1MB log buffer and functions for extracting data from it at user level. NOTE this is only tested on the sabre and will not work on platforms with &lt; 512mb memory. This is not fully implemented for x86.<br /> **none** -&gt; No Benchmarking features enabled.<br /> **generic** -&gt; Enable global benchmarks config variable with no specific features.<br /> **track_kernel_entries** -&gt; Log kernel entries information including timing, number of invocations and arguments for system calls, interrupts, user faults and VM faults.<br /> **tracepoints** -&gt; Enable manually inserted tracepoints that the kernel will track time consumed between.<br /> **track_utilisation** -&gt; Enable the kernel to track each thread's utilisation time.</td>
            <td>(FIXME: Which config supported?) Disabled if KernelVerificationBuild is set. (Default: None)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMaxNumTracePoints</td>
            <td>The maximum number of different trace point identifiers which can be used. Use `TRACE_POINT_START(k)`and `TRACE_POINT_STOP(k)` macros for recording data, where k is an integer between 0 and this value - 1</td>
            <td>Requires KernelBenchmarksTracepoints is set. (Default: 1)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelOptimisation</td>
            <td>Select the kernel optimisation level. This should only be changed as part of performance analysis. -O2 is required for normal use.</td>
            <td>Always set. (Default: -O2)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelFWholeProgram</td>
            <td>Enable -fwhole-program when linking kernel. This should work modulo gcc bugs, which are not uncommon with -fwhole-program. Consider this feature experimental!</td>
            <td>Always set. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelDangerousCodeInjection</td>
            <td>Adds a system call that allows users to specify code to be run in kernel mode. Useful for profiling.</td>
            <td>Can only be set if: NOT KernelARMHypervisorSupport;NOT KernelVerificationBuild;NOT KernelPlatformHikey;NOT KernelSkimWindow. (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelStackBits</td>
            <td>This describes the log2 size of the kernel stack. Great care should be taken asthere is no guard below the stack so setting this too small will cause randommemory corruption</td>
            <td>Always set. (Default: 12 bits)</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h3 id="target-hardware-architectureplatform-options">Target hardware architecture/platform options</h3>

<table>
    <thead>
        <tr>
            <th>Configurations</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>KernelPlatform</td>
            <td>Hardware platform to target. This setting influences other kernel configuration values.</td>
            <td>Supported platforms can be found [here](http://127.0.0.1:4000/status/sel4#hardware-platforms).</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelSel4Arch</td>
            <td>Architecture mode for building the kernel.</td>
            <td>Supported values: (aarch32, aarch64, arm_hyp, riscv32, riscv64, x86_64, ia32).</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelHaveFPU</td>
            <td>Set if the platform and toolchain supports floating point unit.</td>
            <td>Set on x86, Unset on RISC-V, toolchain + verirification dependent on Arm</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMaxNumNodes</td>
            <td>Max number of CPU cores to boot.</td>
            <td>Always set. (Default: 1 node)</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h4 id="x86">x86</h4>

<table>
    <thead>
        <tr>
            <th>Configurations</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>KernelX86MicroArch</td>
            <td>Select the x86 micro architecture.</td>
            <td>x86 Option. Supported options:nehalem, generic, westmere, sandy, ivy, haswell, broadwell, skylake. (Default: nehalem)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelIRQController (x86)</td>
            <td>Select the IRQ controller seL4 will use. Code for others may still be included if needed to disable at run time.</td>
            <td>x86 Option. Supported options: PIC, IOAPIC. (Default: IOAPIC)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMaxNumIOAPIC</td>
            <td>Configure the maximum number of IOAPIC controllers that can be supported. SeL4 will detect IOAPICs regardless of whether the IOAPIC will actually be used as the final IRQ controller.</td>
            <td>x86 Option. (Default: 1)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelLAPICMode</td>
            <td>Select the mode local APIC will use: XAPIC, X2APIC </td>
            <td>x86 Option. Not all machines support X2APIC mode (Default: XAPIC)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelUseLogcalIDs</td>
            <td>Use logical IDs to broadcast IPI between cores. Not all machines support logical IDs. In xAPIC mode only 8 cores can be addressed using logical IDs.</td>
            <td>x86 Option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelCacheLnSz (x86)</td>
            <td>Define cache line size for x86.</td>
            <td>x86 Option. (Default: 64)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelVTX (x86)</td>
            <td>VT-x support compiled into the kernel.</td>
            <td>x86 Option. (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelIOMMU (x86)</td>
            <td>IOMMU support for VT-d enabled chipset.</td>
            <td>x86 Option. (Default: ON)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMaxRMRREntries</td>
            <td>Sets the maximum number of Reserved Memory Region Reporting structures we support recording from the ACPI tables. These structures are used for setting up passthrouh IOMMU mappings for legacy devices.</td>
            <td>x86 Option. (Default: 32)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMaxVPIDs</td>
            <td>The kernel maintains a mapping of 16-bit VPIDs to VCPUs. This option should be sized as small as possible to save memory, but be at least the number of VCPUs that will be run for optimum performance.</td>
            <td>x86 Option. (Default: 1024)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelHugePage (x86)</td>
            <td>Add support for 1GB huge page.</td>
            <td>x86 Option. Not all recent processor models support this feature (Default: On)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelSupportPCID</td>
            <td>Add support for PCIDs (aka hardware ASIDs).</td>
            <td>x86_64 Option. Not all recent processor models support this feature (Default: On)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelSyscall (x86)</td>
            <td>Which syscall method that the kernel supports. This config should be set to the most efficient one that is support by the hardware the system will run on.</td>
            <td>x86 Option. The kernel only ever supports one method at a time: syscall, sysenter (Default: syscall)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelFPU (x86)</td>
            <td>Choose the method that FPU state is stored in. This directly affects the method used to save and restore it. <br />**FXSAVE** -&gt; This chooses the legacy 512-byte region used by the fxsave and fxrstor functions<br /> **XSAVE** -&gt; This chooses the variable xsave region, and enables the ability to use any of the xsave variants to save and restore. The actual size of the region is dependent on the features enabled.</td>
            <td>x86 Option. (Default: XSAVE)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelXSave (x86)</td>
            <td>The XSAVE area supports multiple instructions to save and restore to it. These instructions are dependent upon specific CPU support. See Chapter 13 of Volume 1 of the Intel Architectures SOftware Developers Manual for discussion on the init and modified optimizations.<br /> **XSAVE** -&gt; Original XSAVE instruction. This is the only XSAVE instruction that is guaranteed to exist if XSAVE is present<br /> **XSAVEC** -&gt; Save state with compaction. This compaction has to do with minimizing the total size of XSAVE buffer, if using non contiguous features, XSAVEC will attempt to use the init optimization when saving <br />**XSAVEOPT** -&gt; Save state taking advantage of both the init optimization and modified optimization<br /> **XSAVES** -&gt; Save state taking advantage of the modified optimization. This instruction is only available in OS code, and is the preferred save method if it exists.</td>
            <td>x86 Option. (Default: XSAVEOPT)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelXSaveFeatureSet (x86)</td>
            <td>XSAVE can save and restore the state for various features through the use of the feature mask. This config option represents the feature mask that we want to support. The CPU must support all bits in this feature mask. Current known bits are <br /> 0 - FPU <br />1 - SSE <br />2 - AVX <br />FPU and SSE is guaranteed to exist if XSAVE exists.</td>
            <td>x86 Option. (Default: 3)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelFSGSBase (x86)</td>
            <td>There are three ways to to set FS/GS base addresses: IA32_FS/GS_GDT, IA32_FS/GS_BASE_MSR, and fsgsbase instructions. IA32_FS/GS_GDT and IA32_FS/GS_BASE_MSR are availble for 32-bit. IA32_FS/GS_BASE_MSR and fsgsbase instructions are available for 64-bit.</td>
            <td>x86 Option. (Default x86_64: fsgsbase, ia32: gdt)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMultibootGFXMode (x86)</td>
            <td>The type of graphics mode to request from the boot loader. This is encoded into the multiboot header and is merely a hint, the boot loader is free to ignore or set some other mode</td>
            <td>x86 Option. Options: none, text, linear (Default: none)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMultibootGFXDepth (x86)</td>
            <td>The bits per pixel of the linear graphics mode ot request. Value of zero indicates no preference.</td>
            <td>x86 Option. (Default: 32)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMultibootGFXWidth (x86)</td>
            <td>The width of the graphics mode to request. For a linear graphics mode this is the number of pixels. For a text mode this is the number of characters, value of zero indicates no preference.</td>
            <td>x86 Option. (Default: 0)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMultibootGFXHeight (x86)</td>
            <td>The height of the graphics mode to request. For a linear graphics mode this is the number of pixels. For a text mode this is the number of characters, value of zero indicates no preference.</td>
            <td>x86 Option. (Default: 0)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMultiboot1Header (x86)</td>
            <td>Inserts a header that indicates to the bootloader that the kernel supports a multiboot 1 boot header</td>
            <td>x86 Option. (Default: On)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelMultiboot2Header (x86)</td>
            <td>Inserts a header that indicates to the bootloader that the kernel supports a multiboot 2 boot header. This is can be enabled together with a multiboot 1 header and the boot loader may use either one</td>
            <td>x86 Option. (Default: On)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelSkimWindow (x86)</td>
            <td>Prevent against the Meltdown vulnerability by using a reduced Static Kernel Image and Micro-state window instead of having all kernel state in the kernel window. This only needs to be enabled if deploying to a vulnerable processor</td>
            <td>x86_64 Option. (Default: On)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelExportPMCUser (x86)</td>
            <td>Grant user access to the Performance Monitoring Counters. This allows the user to read performance counters, although not control what the counters are and whether or not they are counting. Nevertheless whilst this is useful for evalulating performance this option opens timing and covert channels.</td>
            <td>x86 Option. (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelExportPMCUser (x86)</td>
            <td>Grant user access to the Performance Monitoring Counters. This allows the user to read performance counters, although not control what the counters are and whether or not they are counting. Nevertheless whilst this is useful for evalulating performance this option opens timing and covert channels.</td>
            <td>x86 Option. (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelX86DangerousMSR</td>
            <td>rdmsr/wrmsr kernel interface. Provides a syscall interface for reading and writing arbitrary MSRs. This is extremely dangerous as no checks are performed and exists to aid debugging and benchmarking.</td>
            <td>x86 Option. (Default: Off)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelX86IBRSMode</td>
            <td>Indirect Branch Restricted Speculation mode Used to prevent a user from manipulating the branch predictor to manipulate speculative execution of other processes. On current processors IBRS has a prohibitive performance penalty and it is recommended that it be disabled such that software mitigations are used instead. Software mitigation is done by disabling jump tables (the only form of indirect jump in seL4 except for 'ret') and flushing the RSB on vmexit. Flushing the RSB at other times is not needed as seL4 does not switch kernel stacks and so is not vulnerable to RSB underflow. The STIBP is essentially software mitigation but enables the single thread isolation for branch predictions. This is only needed if attempting to protect user level process from each other in a multicore environment.</td>
            <td>x86 Option. (Default: ibrs_none)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelX86IBPBOnContextSwitch</td>
            <td>Performs a IBPB on every context switch to prevent Spectre attacks between user processes. This is extremely expensive and is recommended you only turn this on if absolutely necessary. Note that in a multicore environment you should also enable STIBP to prevent other cores retraining the branch predictor even after context switch.</td>
            <td>x86 Option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelX86RSBOnContextSwitch</td>
            <td>Flushes the RSB on context switch to prevent Spectre attacks between user processes. Whilst not nearly as expensive as an IBPB it is not enabled by default as it is largely pointless to flush the RSB without also doing an IBPB as the RSB is already a harder attack vector.</td>
            <td>x86 Option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>

<h4 id="arm">Arm</h4>

<table>
    <thead>
        <tr>
            <th>Configurations</th>
            <th>Description</th>
            <th>Status</th>
            <th>Maintained by</th>
        </tr>
    </thead>
    <tbody>
        <tr>
            <td>KernelDebugDisableL2Cache</td>
            <td>Do not enable the L2 cache on startup for debugging purposes.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelDebugDisableL1ICache</td>
            <td>Do not enable the L1 instruction cache on startup for debugging purposes.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelDebugDisableL1DCache</td>
            <td>Do not enable the L1 data cache on startup for debugging purposes.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelDebugDisableBranchPrediction</td>
            <td>Do not enable branch prediction (also called program flow control) on startup for debugging purposes. This makes execution time more deterministic at the expense of dramatically decreasing performance.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmHypervisorSupport</td>
            <td>Utilise Arm virtualisation extensions to build the kernel as a hypervisor.</td>
            <td>Arm option. (Default: the value of ARM_HYP (TRUE or FALSE))</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmHypervisorSupport</td>
            <td>Utilise Arm virtualisation extensions to build the kernel as a hypervisor.</td>
            <td>Arm option. (Default: the value of ARM_HYP (TRUE or FALSE))</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmHypEnableVCPUCP14SaveAndRestore</td>
            <td>The kernel does not save or restore VCPUs' CP14 accesses. As a result, accessing VPU threads' CP14 context triggers a trap, which allows the kernel to intercept the access and deliver it as a fault message to the VM monitor.</td>
            <td>Arm option. (Default: ON)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmErrata430973</td>
            <td>Enable a workaround for 430973 Cortex-A8 (r1p0..r1p2) erratum An error occurs if an instruction contains Arm/Thumb interworking branch that is replaced by a different instruction from the same virtual address.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmErrata773022</td>
            <td>Enable a workaround for 773022 Cortex-A15 (r0p0..r0p4) erratum. An error occurs on rare sequences of instructions which results on the loop buffer delivering incorrect instructions. The workaround is to disable the loop buffer.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmSMMU</td>
            <td>Enable the System MMU on the Tegra TK1 SoC.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmEnableA9Prefetcher</td>
            <td>Enable the prefetcher on Arm Cortex-A9 core. The Cortex-A9 has L1 and L2 prefetchers, which are disabled by default. This config option enables those prefetchers, requiring the kernel to be executed in the secure mode. Arm document indicates that the bit used for enabling those prefetchers is no longer supported from version r4p1 of the Cortex-A9. However, the correctness of that is uncertain.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmExportPMUUser</td>
            <td>Grant user access to the performance monitoring unit. While useful for benchmarking, this option opens the possibility of timing channels.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelArmDisableWFIWFETraps</td>
            <td>Disable the trapping of WFI  and WFE instructions by configuring the Hyp Configuration Registor (HCR) of a VCPU.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelARMSMMUInterruptEnable</td>
            <td>Enable system MMU (SMMU) interrupts.  System MMU interrupts currently only serve for debugging purpose because they are not forwarded to user level. Enabling this will cause some SMMU fault types to print out a message in the kernel. High frequency faults can result in all time spent in the kernel printing fault messages.</td>
            <td>Arm option. (Default: OFF)</td>
            <td>seL4 Foundation</td>
        </tr>
        <tr>
            <td>KernelAArch32FPUEnableContextSwitch</td>
            <td>Enable hardware VFP and SIMD context switch. This enables the VFP and SIMD context switch on platforms with hardware support, allowing the user to execute hardware VFP and SIMD operations in a multithreading environment, instead of relying on software emulation of FPU/VFP from the C library (e.g. mfloat-abi=soft).</td>
            <td>Arm option. (Default: ON)</td>
            <td>seL4 Foundation</td>
        </tr>
    </tbody>
</table>


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<div class="sidebar-toc hidden-xs hidden-sm col-md-3 col-lg-3">
    <ul id="toc" class="section-nav">
<li class="toc-entry toc-h2"><a href="#verification-status">Verification Status</a></li>
<li class="toc-entry toc-h2"><a href="#features">Features</a>
<ul>
<li class="toc-entry toc-h3"><a href="#architectures">Architectures</a></li>
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<li class="toc-entry toc-h3"><a href="#multicore">Multicore</a></li>
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<li class="toc-entry toc-h4"><a href="#serial">Serial</a></li>
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<li class="toc-entry toc-h3"><a href="#device-trees">Device trees</a></li>
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<ul>
<li class="toc-entry toc-h3"><a href="#testing">Testing</a></li>
<li class="toc-entry toc-h3"><a href="#benchmarking">Benchmarking</a></li>
</ul>
</li>
<li class="toc-entry toc-h2"><a href="#configurations">Configurations</a>
<ul>
<li class="toc-entry toc-h3"><a href="#generic-configuration-options">Generic configuration options</a></li>
<li class="toc-entry toc-h3"><a href="#scheduling-configuration-options">Scheduling configuration options</a></li>
<li class="toc-entry toc-h3"><a href="#debug-configuration-options">Debug configuration options</a></li>
<li class="toc-entry toc-h3"><a href="#performance-analysis-and-profiling-configuration-options">Performance analysis and profiling configuration options</a></li>
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<li class="toc-entry toc-h4"><a href="#x86">x86</a></li>
<li class="toc-entry toc-h4"><a href="#arm">Arm</a></li>
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